Digital Hardware Design

DSP Processor

A traditional DSP comes with a fixed instruction set. The design is focused on traditional DSP applications with basic DSP functionality of Multiply Accumulate (MAC) operation. The trend is to design a Very Long Instruction Word (VLIW) instruction set and provide multiple MAC operations capabilities in the hardware. There is a range of processors available in the market with these capabilities but they only suit to general class of applications as they focused a broad range of applications. These processors are not optimized for specific applications and hence the performance to cost ratio of the resultant systems is not always optimal. CARE team has designed several application specific DSPs which outperform general purpose DSPs in performance and cost.

Security Processor

CARE team has experience in designing very high data rate IPSec processing components and complete HW/SW VPN solution. These components are easily pluggable in any networking or computing system as soft macros. These components off load the main processor from computationally intensive operations of IP security protocols. A list of these components are as follows:

• DES, 3DES and AES based Encryption/Decryption 
• DH, RSA and DSA based key generation
• Main and aggressive IKE modes implemented for RSA Signatures, as well as RSA Private and Public Key generation methods
• Remote user ID Authentication to protect against “Man in the Middle Attacks”
• SHA, MD5, RIPEMD-128/192, TIGER (with and without HMAC) based Authentication

Media Processor

CARE team has designed and developed highest density Media Processor for Carrier Class Media Gateway Applications. The Media Processor provides:

• Three levels of parallelism for high-density and low-power media processing i.e.:
  • Scheduler 
  • Media Switch
  • Processing Engine
• Advanced memory management for high throughput
• Suport for block-level and sample-by-sample processing
• Rich Media Instruction Set Architecture
• Dynamic swapping of software components at run time
• Non-service affecting remote software upgrades
• Remote Debug and Development
• Sleep unused resouces for low power consumption
• Fully programmable solution: LEC, Voice Encoder/Decoder, etc
• Software compatibilty at the API level for chip upgrades
• Advanced Integrated Development Environment

                EDA Tools           

                                                                                                                        Previous Page