Digital Hardware Design
FPGA Based
At CARE we have a rich portfolio of designing FPGA-based
systems from concept to implementation. We have designed FPGA-based
systems for Nortel Networks, NEC, STM wireless. Our complex real-time
systems consist of micro-controller, digital signal processor and FPGA.
We specialize in optimally partitioning the design into HW/SW modules.
The HW modules are mapped as fully parallel, time-shared, or micro-coded
state machines on FPGA.
SOC
CARE team has designed three highly complex SoCs for technologies
ranging .18 micron to .13 micron. CARE universal SoC platform can give a
jump-start to any complex SoC design. The platform has SDRAM memory
I/Os, DMA, CPU interfaces, HW embedded RTOS for multiprocessors, inter
processor communication platform.
ASIC
CARE team specializes in mapping computationally
intensive algorithms in HW. The team has experience in mapping
algorithms as programmable processor with enough flexibility to map an
entire family of these algorithm on the hardware.
Viterbi decoder with puncturing
Reed Solomon encoder and decoder
Multi Channel DTMF gererator for VoIP applications
Speech Coders , G.711, G.729a, G.72
Data modems
Encryption, Decryption, Key exchange
JPEG
Motion estimation and compensation
Interfaces for PCI/PCI-X ,DDR memmory MIPS/ARM
processors etc
Network Processor
CARE team has designed and developed high
throughput Network Processor and its peripherals. The salient features
of the processor are the following:
- OC-3 rate Real Time Deep Packet Processing and OC-12 Aggregation
and Forwarding
- QoS, Traffic Management and IP Sec with support for simultaneous
connections to ATM, IP, TDM, and back-plane switching fabric
On-chip supported interfaces include:
- GMAC, POS-II, UTOPIA-II, TDMIO, PCI-X, DDR Memory Interfaces
- On-chip Multiple RISC Cores and Cross Connect DMA
- Complete tool-suite for application software development including
C Compiler, Bit-exact hardware simulator, hardware debugger through
J-tag
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